Katsuyuki Sato

Publication Activity (10 Years)

Years Active: 1996-2007
Publications (10 Years): 0

Publications

James D. Warnock, William Bidermann, Albert van der Werf, Katsuyuki Sato
Introduction to the Special Issue on the 2006 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 42 (1) (2007)
Youji Idei, Katsuhiro Shimohigashi, Masakazu Aoki, Hiromasa Noda, Hidetoshi Iwai, Katsuyuki Sato, Tadashi Tachibana
Dual-period self-refresh scheme for low-power DRAM's with on-chip PROM mode register. IEEE J. Solid State Circuits 33 (2) (1998)
Masayuki Nakamura, Tugio Takahashi, Takesada Akiba, Goro Kitsukawa, Makoto Morino, Toshihiro Sekiguchi, Isamu Asano, Katsuo Komatsuzaki, Yoshitaka Tadaki, Songsu Cho, Kazuhiko Kajigaya, Tadashi Tachibana, Katsuyuki Sato
A 29-ns 64-Mb DRAM with hierarchical array architecture. IEEE J. Solid State Circuits 31 (9) (1996)