José Manuel Colmenar

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 7

Top Topics

Genetic Programming

Routing Problem

Top Venues

GECCO Companion

Int. Trans. Oper. Res.

EvoApplications (1)

Publications

Leon Ingelse, José Ignacio Hidalgo, José Manuel Colmenar, Nuno Lourenço, Alcides Fonseca
Comparing Individual Representations in Grammar-Guided Genetic Programming for Glucose Prediction in People with Diabetes. GECCO Companion (2023)
Raul Martin-Santamaria, José Manuel Colmenar, Abraham Duarte
A Scatter Search Approach for the Parallel Row Ordering Problem. MIC (2022)
David Joedicke, Gabriel Kronberger, José Manuel Colmenar, Stephan M. Winkler, José Manuel Velasco, Sergio Contador, José Ignacio Hidalgo
Analysis of the performance of Genetic Programming on the Blood Glucose Level Prediction Challenge 2020. KDH@ECAI (2020)
Alberto Herran, José Manuel Colmenar, Rafael Martí, Abraham Duarte
A parallel variable neighborhood search approach for the obnoxious p-median problem. Int. Trans. Oper. Res. 27 (1) (2020)
José Manuel Colmenar, Rafael Martí, Abraham Duarte
-median problem. Knowl. Based Syst. 144 (2018)
José Manuel Colmenar, Rafael Martí, Abraham Duarte
Heuristics for the Bi-Objective Diversity Problem. Expert Syst. Appl. 108 (2018)
José Manuel Velasco, Oscar Garnica, Sergio Contador, José Manuel Colmenar, Esther Maqueda, Marta Botella, Juan Lanchares, José Ignacio Hidalgo
Enhancing Grammatical Evolution Through Data Augmentation: Application to Blood Glucose Forecasting. EvoApplications (1) (2017)
José Manuel Colmenar, José L. Risco-Martín, David Atienza, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares
Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution. GECCO (2010)
José L. Risco-Martín, David Atienza, José Manuel Colmenar, Oscar Garnica
A parallel evolutionary algorithm to optimize dynamic memory managers in embedded systems. Parallel Comput. 36 (10-11) (2010)
José Luis Risco-Martín, José Manuel Colmenar, David Atienza, José Ignacio Hidalgo
Simulation of High-Performance Memory Allocators. DSD (2010)
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
Characterizing asynchronous variable latencies through probability distribution functions. Microprocess. Microsystems 33 (7-8) (2009)
José Manuel Colmenar, Noelia Morón, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
Modelling Asynchronous Systems using Probability Distribution Functions. PDP (2008)
Guadalupe Miñana, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar, Oscar Garnica, Sonia López
Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders. IET Comput. Digit. Tech. 1 (2) (2007)
Guadalupe Miñana, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares, José Manuel Colmenar, Sonia López
A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors. PATMOS (2006)
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López
Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart. DSD (2006)
Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar
A Power-Aware Technique for Functional Units in High-Performance Processors. DSD (2006)
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López
Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions. Euro-Par (2006)
Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar
Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width. PATMOS (2005)
José Manuel Colmenar, Oscar Garnica, Sonia López, José Ignacio Hidalgo, Juan Lanchares, Román Hermida
Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays. PDP (2004)
Sonia López, Oscar Garnica, José Manuel Colmenar
Enhancing GALS Processor Performance Using Data Classification Based on Data Latency. PATMOS (2004)