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Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart.
José Manuel Colmenar
Oscar Garnica
Juan Lanchares
José Ignacio Hidalgo
Guadalupe Miñana
Sonia López
Published in:
DSD (2006)
Keyphrases
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instruction set
asynchronous communication
computer architecture
multithreading
instruction set architecture
high speed
highly parallel
random access memory
shift register
parallel architecture
parallel processing
application specific
distributed memory
asynchronous circuits
integer arithmetic