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A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors.

Guadalupe MiñanaJosé Ignacio HidalgoOscar GarnicaJuan LancharesJosé Manuel ColmenarSonia López
Published in: PATMOS (2006)
Keyphrases
  • functional units
  • processing elements
  • parallel algorithm
  • power consumption
  • parallel processing
  • distributed memory
  • general purpose
  • parallel computers
  • hardware architecture