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Jorge Juan
ORCID
Publication Activity (10 Years)
Years Active: 2006-2017
Publications (10 Years): 1
Top Topics
Low Cost
Network Parameters
Computing Systems
Software Implementation
Top Venues
PATMOS
Microelectron. J.
Microprocess. Microsystems
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Publications
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Paulino Ruiz-de-Clavijo
,
Enrique Ostúa
,
Manuel Jesús Bellido Díaz
,
Jorge Juan
,
Julian Viejo
,
David Guerrero Martos
Minimalistic SDHC-SPI hardware reader module for boot loader applications.
Microelectron. J.
67 (2017)
Julian Viejo
,
Jose Ignacio Villar
,
Jorge Juan
,
Alejandro Millán
,
Enrique Ostúa
,
Juan Quiros
Long-term on-chip verification of systems with logical events scattered in time.
Microprocess. Microsystems
36 (5) (2012)
Jorge Juan
,
Julian Viejo
,
Manuel J. Bellido
Network Time Synchronization: A Full Hardware Approach.
PATMOS
(2012)
David Guerrero Martos
,
Alejandro Millán
,
Jorge Juan
,
Manuel J. Bellido
,
Paulino Ruiz-de-Clavijo
,
Enrique Ostúa
,
Julian Viejo
Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells.
J. Low Power Electron.
7 (3) (2011)
Julian Viejo
,
Jorge Juan
,
Manuel Jesús Bellido Díaz
,
Alejandro Millán
,
Paulino Ruiz-de-Clavijo
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation.
IEEE Trans. Instrum. Meas.
60 (12) (2011)
Alejandro Millán
,
Manuel J. Bellido
,
Jorge Juan
,
David Guerrero Martos
,
Paulino Ruiz-de-Clavijo
,
Julian Viejo
Comprehensive Analysis on the Internal Power Dissipation of Static CMOS Cells in Ultra-Deep Sub-Micron Technologies.
J. Low Power Electron.
6 (1) (2010)
Julian Viejo
,
Jose Ignacio Villar
,
Jorge Juan
,
Alejandro Millán
,
Manuel Jesús Bellido Díaz
,
Enrique Ostúa
Design and implementation of a suitable core for on-chip long-term verification.
SIES
(2010)
J. I. Villar
,
Jorge Juan
,
Manuel J. Bellido
Efficient techniques and methodologies for embedded system design usign free hardware and open standards.
FPL
(2009)
Alejandro Millán
,
Jorge Juan
,
Manuel J. Bellido
,
David Guerrero Martos
,
Paulino Ruiz-de-Clavijo
,
Julian Viejo
Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates.
PATMOS
(2008)
Julian Viejo
,
Alejandro Millán
,
Manuel J. Bellido
,
Jorge Juan
,
Paulino Ruiz-de-Clavijo
,
David Guerrero Martos
,
Enrique Ostúa
,
Alejandro Muñoz
Design of a FFT/IFFT module as an IP core suitable for embedded systems.
SIES
(2007)
Julian Viejo
,
Manuel J. Bellido
,
Alejandro Millán
,
Enrique Ostúa
,
Jorge Juan
,
Paulino Ruiz-de-Clavijo
,
David Guerrero Martos
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements.
IES
(2006)