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Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates.
Alejandro Millán
Jorge Juan
Manuel J. Bellido
David Guerrero Martos
Paulino Ruiz-de-Clavijo
Julian Viejo
Published in:
PATMOS (2008)
Keyphrases
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power dissipation
power consumption
logic circuits
low power
cmos technology
nm technology
vlsi circuits
chip design
high speed
digital signal processing
power reduction
low cost
design methodology
image sensor
flip flops
finite state machines
power saving
short circuit