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Jongho Jung
Publication Activity (10 Years)
Years Active: 2010-2012
Publications (10 Years): 0
Top Topics
Network Congestion
Active Queue Management
Limit Cycle
Car Racing
Top Venues
ISSCC
IEEE J. Solid State Circuits
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Publications
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Hyun-Woo Lee
,
Hoon Choi
,
Beom-Ju Shin
,
Kyung-Hoon Kim
,
Kyung Whan Kim
,
Jaeil Kim
,
Kwang Hyun Kim
,
Jongho Jung
,
Jae-Hwan Kim
,
Eun Young Park
,
Jong-Sam Kim
,
Jong-Hwan Kim
,
Jin-Hee Cho
,
Nam Gyu Rye
,
Jun Hyun Chun
,
Yunsaing Kim
,
Chulwoo Kim
,
Young-Jung Choi
,
Byong-Tae Chung
A 1.0-ns/1.0-V Delay-Locked Loop With Racing Mode and Countered CAS Latency Controller for DRAM Interfaces.
IEEE J. Solid State Circuits
47 (6) (2012)
Kibong Koo
,
Sunghwa Ok
,
Yonggu Kang
,
Seungbong Kim
,
Choungki Song
,
Hyeyoung Lee
,
Hyungsoo Kim
,
Yongmi Kim
,
Jeonghun Lee
,
Seunghan Oak
,
Yosep Lee
,
Jungyu Lee
,
Joongho Lee
,
Hyungyu Lee
,
Jaemin Jang
,
Jongho Jung
,
Byeongchan Choi
,
Yong-Ju Kim
,
Youngdo Hur
,
Yunsaing Kim
,
Byong-Tae Chung
,
Yongtak Kim
A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and ×4 half-page architecture.
ISSCC
(2012)
Hyun-Woo Lee
,
Yong-Hoon Kim
,
Won-Joo Yun
,
Eun Young Park
,
Kang Youl Lee
,
Jaeil Kim
,
Kwang Hyun Kim
,
Jongho Jung
,
Kyung Whan Kim
,
Nam Gyu Rye
,
Kwan-Weon Kim
,
Jun Hyun Chun
,
Chulwoo Kim
,
Young-Jung Choi
,
Byong-Tae Chung
,
Joong Sik Kih
A 7.7mW/1.0ns/1.35V delay locked loop with racing mode and OA-DCC for DRAM interface.
ISCAS
(2010)