John Dielissen

Publication Activity (10 Years)

Years Active: 2001-2008
Publications (10 Years): 0

Publications

John Dielissen, Nur Engin, Sergei Sawitzki, Kees van Berkel
Multistandard FEC Decoders for Wireless Devices. IEEE Trans. Circuits Syst. II Express Briefs (3) (2008)
John Dielissen, Andries Hekstra
Non-fractional parallelism in LDPC decoder implementations. DATE (2007)
John Dielissen, Andries Hekstra, Vincent Berg
Low cost LDPC decoder for DVB-S2. DATE Designers' Forum (2006)
Kees Goossens, John Dielissen, Andrei Radulescu
Æthereal Network on Chip: Concepts, Architectures, and Implementations. IEEE Des. Test Comput. 22 (5) (2005)
Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees Goossens
An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (1) (2005)
Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. DATE (2005)
Mauro Cocco, John Dielissen, Marc J. M. Heijligers, Andries Hekstra, Jos Huisken
A Scalable Architecture for LDPC Decodin. DATE (2004)
Andrei Radulescu, John Dielissen, Kees Goossens, Edwin Rijpkema, Paul Wielage
An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration. DATE (2004)
Bart Vermeulen, John Dielissen, Kees Goossens, Calin Ciordas
Bringing communication networks on a chip: test and verification implications. IEEE Commun. Mag. 41 (9) (2003)
Edwin Rijpkema, Kees G. W. Goossens, Andrei Radulescu, John Dielissen, Jef L. van Meerbergen, Paul Wielage, Erwin Waterlander
Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip. DATE (2003)
John Dielissen, Benito Otero Mathijssen, Jos Huisken
Breaking an application specific instruction-set processor: the first step towards embedded software testing. HLDVT (2002)
John Dielissen, Jef L. van Meerbergen, Marco Bekooij, Françoise Harmsze, Sergej Sawitzki, Jos Huisken, Albert van der Werf
Power-efficient layered turbo decoder processor. DATE (2001)