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Power-efficient layered turbo decoder processor.

John DielissenJef L. van MeerbergenMarco BekooijFrançoise HarmszeSergej SawitzkiJos HuiskenAlbert van der Werf
Published in: DATE (2001)
Keyphrases
  • power consumption
  • parallel processing
  • parallel architectures
  • instruction set
  • power distribution
  • ibm power processor