John A. McNeill

Publication Activity (10 Years)

Years Active: 1997-2018
Publications (10 Years): 6

Top Topics

Successive Approximation

Fundamental Limits

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Shahab Farazi, Andrew G. Klein, John A. McNeill, D. Richard Brown
On the Age of Information in Multi-Source Multi-Hop Wireless Status Update Networks. SPAWC (2018)
Sulin Li, Jianping Gong, John A. McNeill
VCO-Based ADC With Digital Background Calibration in 65nm CMOS. NEWCAS (2018)
John A. McNeill, Sulin Li, Jianping Gong, Long Pham
Fundamental limits on energy efficiency performance of VCO-based ADCs. ISCAS (2017)
John A. McNeill, Sabah Razavi, Kirty Vedula, D. Richard Brown
Experimental characterization and modeling of low-cost oscillators for improved carrier phase synchronization. I2MTC (2017)
Jianping Gong, Sulin Li, John A. McNeill
Sub-picosecond-jitter clock generation for interleaved ADC with Delay-Locked-Loop in 28nm CMOS. ISCAS (2016)
John A. McNeill, Rabeeh Majidi, Jianping Gong
"Split ADC" Background Linearization of VCO-Based ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2015)
John A. McNeill, Rabeeh Majidi, Jianping Gong, Chengxin Liu
Lookup-table-based background linearization for VCO-based ADCs. CICC (2014)
John A. McNeill, Jianping Gong, Rabeeh Majidi
Design of a sub-picosecond-jitter delay-lock-loop for interleaved ADC sample clock synthesis. MWSCAS (2013)
John A. McNeill, Christopher L. David, Michael C. W. Coln, Ka Yan Chan, Cody Brenneman
Split ADC background self-calibration of a 16-b successive approximation ADC in 180nm CMOS. I2MTC (2013)
Rabeeh Majidi, Anthony Crasso, John A. McNeill
Digital background calibration of redundant split-flash ADC in 45nm CMOS. ISCAS (2012)
John A. McNeill, Ka Yan Chan, Michael C. W. Coln, Christopher L. David, Cody Brenneman
All-Digital Background Calibration of a Successive Approximation ADC Using the "Split ADC" Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2011)
John A. McNeill, Michael C. W. Coln, D. Richard Brown, Brian J. Larivee
Digital Background-Calibration Algorithm for "Split ADC" Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2009)
John A. McNeill, Christopher L. David, Michael C. W. Coln, Rosa Croughwell
"Split ADC" Calibration for All-Digital Correction of Time-Interleaved ADC Errors. IEEE Trans. Circuits Syst. II Express Briefs (5) (2009)
John A. McNeill
Noise in short channel MOSFETs. CICC (2009)
John A. McNeill, Sanjeev Goluguri, Abhilash Nair
"Split-ADC" Digital Background Correction of Open-Loop Residue Amplifier Nonlinearity Errors in a 14b Pipeline ADC. ISCAS (2007)
Jipeng Li, Un-Ku Moon, John A. McNeill, Michael C. W. Coln, Brian J. Larivee
Comments on 'Split ADC' architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC". IEEE J. Solid State Circuits 41 (6) (2006)
John A. McNeill, Michael C. W. Coln, Brian J. Larivee
"Split ADC" architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC. IEEE J. Solid State Circuits 40 (12) (2005)
Chengxin Liu, John A. McNeill
Jitter in oscillators with 1/f noise sources. ISCAS (1) (2004)
Yuping Toh, John A. McNeill
Single-ended to differential converter for multiple-stage single-ended ring oscillators. IEEE J. Solid State Circuits 38 (1) (2003)
Jennifer Stander, John A. McNeill, Reinhold Ludwig
Multiprobe impedance measurement system for nondestructive evaluation and test of "green state" powder metallurgy parts. IEEE Trans. Instrum. Meas. 47 (5) (1998)
John A. McNeill, R. Vat
Integrating mixed signal IC design research into a project-based undergraduate microelectronics curriculum. MSE (1997)
John A. McNeill
Jitter in ring oscillators. IEEE J. Solid State Circuits 32 (6) (1997)