Jing Li

Publication Activity (10 Years)

Years Active: 2009-2013
Publications (10 Years): 0

Top Topics

Wavelet Packet Transform

Fault Diagnosis

Analog Circuits

Top Venues

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

Publications

Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake
Structured Analog Circuit and Layout Design with Transistor Array. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2013)
Yu Zhang, Gong Chen, Bo Yang, Jing Li, Qing Dong, Mingyu Li, Shigetoshi Nakatake
Analog Circuit Synthesis with Constraint Generation of Layout-Dependent Effects by Geometric Programming. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2013)
Yu Zhang, Bo Liu, Bo Yang, Jing Li, Shigetoshi Nakatake
CMOS op-amp circuit synthesis with geometric programming models for layout-dependent effects. ISQED (2012)
Qing Dong, Bo Yang, Gong Chen, Jing Li, Shigetoshi Nakatake
Transistor channel decomposition for structured analog layout, manufacturability and low-power applications. ISQED (2012)
Kota Shinohara, Mihoko Hidaka, Jing Li, Qing Dong, Bo Yang, Shigetoshi Nakatake
Layout-aware variation evaluation of analog circuits and its validity on op-amp designs. ACM Great Lakes Symposium on VLSI (2011)
Bo Liu, Qing Dong, Bo Yang, Jing Li, Shigetoshi Nakatake
Layout-aware mismatch modeling for CMOS current sources with D/A converter analysis. ISQED (2011)
Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake
Structured analog circuit design and MOS transistor decomposition for high accuracy applications. ICCAD (2010)
Jing Li, Bo Yang, Qing Dong, Shigetoshi Nakatake
Post-placement STI well width adjusting by geometric programming for device mobility enhancement in critical path. ISCAS (2010)
Jing Li, Bo Yang, Xiaochuan Hu, Qing Dong, Shigetoshi Nakatake
STI stress aware placement optimization based on geometric programming. ACM Great Lakes Symposium on VLSI (2009)
Qing Dong, Bo Yang, Jing Li, Shigetoshi Nakatake
Incremental buffer insertion and module resizing algorithm using geometric programming. ACM Great Lakes Symposium on VLSI (2009)
Qing Dong, Bo Yang, Jing Li, Shigetoshi Nakatake
Incremental Buffer Insertion and Module Resizing Algorithm Using Geometric Programming. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2009)