Jesús Urresti

Publication Activity (10 Years)

Years Active: 2003-2014
Publications (10 Years): 0

Top Topics

Partial Occlusion

Electrical Power

Design Patterns

Top Venues

Microelectron. Reliab.

IET Circuits Devices Syst.

Publications

Jesús Urresti, Salvador Hidalgo, David Flores, Daniel Fernández Hevia
3.3 kV PT-IGBT with voltage-sensor monolithically integrated. IET Circuits Devices Syst. 8 (3) (2014)
Ihsan Supono, Jesús Urresti, Alberto Castellazzi, David Flores
Overload robust IGBT design for SSCB application. Microelectron. Reliab. 54 (9-10) (2014)
Ignasi Cortés, Xavier Perpiñà, Jesús Urresti, Xavier Jordà, José Rebollo
Study of layout influence on ruggedness of NPT-IGBT devices by physical modelling. Microelectron. Reliab. 52 (9-10) (2012)
Jesús Urresti, Salvador Hidalgo, David Flores, Jaume Roig, Ignasi Cortés, José Rebollo
Lateral punch-through TVS devices for on-chip protection in low-voltage applications. Microelectron. Reliab. 45 (7-8) (2005)
Ignasi Cortés, Jaume Roig, David Flores, Jesús Urresti, Salvador Hidalgo, José Rebollo
Analysis of hot-carrier degradation in a SOI LDMOS transistor with a steep retrograde drift doping profile. Microelectron. Reliab. 45 (3-4) (2005)
Jesús Urresti, Salvador Hidalgo, David Flores, Jaume Roig, José Rebollo, I. Mazarredo
Optimisation of very low voltage TVS protection devices. Microelectron. J. 34 (9) (2003)