Ishan G. Thakkar

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 69

Top Topics

Efficient Inference

Comparative Study

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Oluwaseun Adewunmi Alo, Sairam Sri Vatsavai, Ishan G. Thakkar
Scaling Analog Photonic Accelerators for Byte-Size, Integer General Matrix Multiply (GEMM) Kernels. CoRR (2024)
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Oluwaseun Adewunmi Alo, Jeffrey Todd Hastings, Justin Scott Woods
A Low-Dissipation and Scalable GEMM Accelerator with Silicon Nitride Photonics. CoRR (2024)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Oluwaseun Adewunmi Alo, Ishan G. Thakkar
A Comparative Analysis of Microrings Based Incoherent Photonic GEMM Accelerators. ISQED (2024)
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Oluwaseun Adewunmi Alo, Jeffrey Todd Hastings, Justin Scott Woods
A Low-Dissipation and Scalable GEMM Accelerator with Silicon Nitride Photonics. ISQED (2024)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Oluwaseun Adewunmi Alo, Ishan G. Thakkar
A Comparative Analysis of Microrings Based Incoherent Photonic GEMM Accelerators. CoRR (2024)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar
HEANA: A Hybrid Time-Amplitude Analog Optical Accelerator with Flexible Dataflows for Energy-Efficient CNN Inference. CoRR (2024)
Venkata Sai Praneeth Karempudi, Janibul Bashir, Ishan G. Thakkar
An Analysis of Various Design Pathways Towards Multi-Terabit Photonic On-Interposer Interconnects. ACM J. Emerg. Technol. Comput. Syst. 20 (2) (2024)
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Jeffrey Todd Hastings
A Polymorphic Electro-Optic Logic Gate for High-Speed Reconfigurable Computing Circuits. CoRR (2023)
Ishan G. Thakkar, Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi
High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures. ACM Great Lakes Symposium on VLSI (2023)
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Jeffrey Todd Hastings
A Polymorphic Electro-Optic Logic Gate for High-Speed Reconfigurable Computing Circuits. ISQED (2023)
Sairam Sri Vatsavai, Ishan G. Thakkar
A Bit-Parallel Deterministic Stochastic Multiplier. ISQED (2023)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar, Sayed Ahmad Salehi, Jeffrey Todd Hastings
SCONNA: A Stochastic Computing Based Optical Accelerator for Ultra-Fast, Energy-Efficient Inference of Integer-Quantized CNNs. IPDPS (2023)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar
An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks. CoRR (2023)
Ishan G. Thakkar, Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi
High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures. CoRR (2023)
Venkata Sai Praneeth Karempudi, Ishan G. Thakkar, Jeffrey Todd Hastings
A Silicon Nitride Microring Modulator for High-Performance Photonic Integrated Circuits. CoRR (2023)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar
An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks. ISQED (2023)
Venkata Sai Praneeth Karempudi, Janibul Bashir, Ishan G. Thakkar
An Analysis of Various Design Pathways Towards Multi-Terabit Photonic On-Interposer Interconnects. CoRR (2023)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar, Ahmad Salehi, Jeffrey Todd Hastings
SCONNA: A Stochastic Computing Based Optical Accelerator for Ultra-Fast, Energy-Efficient Inference of Integer-Quantized CNNs. CoRR (2023)
Sairam Sri Vatsavai, Ishan G. Thakkar
A Bit-Parallel Deterministic Stochastic Multiplier. CoRR (2023)
Supreeth Mysore Shivanandamurthy, Sairam Sri Vatsavai, Ishan G. Thakkar, Sayed Ahmad Salehi
AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning. ISQED (2023)
Supreeth Mysore Shivanandamurthy, Sairam Sri Vatsavai, Ishan G. Thakkar, Sayed Ahmad Salehi
AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning. CoRR (2023)
Sairam Sri Vatsavai, Ishan G. Thakkar
Photonic Reconfigurable Accelerators for Efficient Inference of CNNs with Mixed-Sized Tensors. CoRR (2022)
Venkata Sai Praneeth Karempudi, Febin Sunny, Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Mahdi Nikdast, Sudeep Pasricha
Photonic Networks-on-Chip Employing Multilevel Signaling: A Cross-Layer Comparative Study. ACM J. Emerg. Technol. Comput. Syst. 18 (3) (2022)
Sairam Sri Vatsavai, Ishan G. Thakkar
Photonic Reconfigurable Accelerators for Efficient Inference of CNNs With Mixed-Sized Tensors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Amlan Ganguly, Sergi Abadal, Ishan G. Thakkar, Natalie Enright Jerger, Marc D. Riedel, Masoud Babaie, Rajeev Balasubramonian, Abu Sebastian, Sudeep Pasricha, Baris Taskin
Interconnects for DNA, Quantum, In-Memory, and Optical Computing: Insights From a Panel Discussion. IEEE Micro 42 (3) (2022)
Venkata Sai Praneeth Karempudi, Ishan G. Thakkar, Jeffrey Todd Hastings
A Silicon Nitride Microring Based High-Speed, Tuning-Efficient, Electro-Refractive Modulator. iSES (2022)
Bobby Bose, Ishan G. Thakkar
Characterization and Mitigation of Electromigration Effects in TSV-Based Power Delivery Network Enabled 3D-Stacked DRAMs. CoRR (2021)
Sairam Sri Vatsavai, Ishan G. Thakkar
Silicon Photonic Microring Based Chip-Scale Accelerator for Delayed Feedback Reservoir Computing. VLSI Design (2021)
Venkata Sai Praneeth Karempudi, Febin Sunny, Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Mahdi Nikdast, Sudeep Pasricha
Photonic Networks-on-Chip Employing Multilevel Signaling: A Cross-Layer Comparative Study. CoRR (2021)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha, Sairam Sri Vatsavai, Varun Bhat
Exploiting Process Variations to Secure Photonic NoC Architectures From Snooping Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing. CoRR (2021)
Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing. ISVLSI (2021)
Febin Sunny, Asif Mirza, Ishan G. Thakkar, Mahdi Nikdast, Sudeep Pasricha
ARXON: A Framework for Approximate Communication over Photonic Networks-on-Chip. CoRR (2021)
Febin P. Sunny, Asif Mirza, Ishan G. Thakkar, Mahdi Nikdast, Sudeep Pasricha
ARXON: A Framework for Approximate Communication Over Photonic Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 29 (6) (2021)
Venkata Sai Praneeth Karempudi, Shreyan Datta, Ishan G. Thakkar
Design Exploration and Scalability Analysis of a CMOS-Integrated, Polymorphic, Nanophotonic Arithmetic-Logic Unit. SenSys (2021)
Bobby Bose, Ishan G. Thakkar
Characterization and Mitigation of Electromigration Effects in TSV-Based Power Delivery Network Enabled 3D-Stacked DRAMs. ACM Great Lakes Symposium on VLSI (2021)
Sairam Sri Vatsavai, Ishan G. Thakkar
Silicon Photonic Microring Based Chip-Scale Accelerator for Delayed Feedback Reservoir Computing. CoRR (2021)
Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi
ODIN: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-Situ Neural Network Processing in Phase Change RAM. CoRR (2021)
Febin Sunny, Asif Mirza, Ishan G. Thakkar, Sudeep Pasricha, Mahdi Nikdast
LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip. CoRR (2020)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar
PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance. NOCS (2020)
Chao-Hsuan Huang, Ishan G. Thakkar
Improving the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration. ICCD (2020)
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar
Redesigning Photonic Interconnects with Silicon-on-Sapphire Device Platform for Ultra-Low-Energy On-Chip Communication. ACM Great Lakes Symposium on VLSI (2020)
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar
Redesigning Photonic Interconnects with Silicon-on-Sapphire Device Platform for Ultra-Low-Energy On-Chip Communication. CoRR (2020)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha, Sairam Sri Vatsavai, Varun Bhat
Exploiting Process Variations to Secure Photonic NoC Architectures from Snooping Attacks. CoRR (2020)
Chao-Hsuan Huang, Ishan G. Thakkar
Mitigating the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration. CoRR (2020)
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan G. Thakkar
PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance. CoRR (2020)
Febin Sunny, Asif Mirza, Ishan G. Thakkar, Sudeep Pasricha, Mahdi Nikdast
LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip. ACM Great Lakes Symposium on VLSI (2020)
Chao-Hsuan Huang, Ishan G. Thakkar
Mitigating Write Disturbance in Phase Change Memory Architectures. CASES (work in progress) (2019)
Venkata Sai Praneeth Karempudi, Ishan G. Thakkar
Mitigating inter-channel crosstalk non-uniformity in microring filter arrays of photonic NoCs: work-in-progress. CODES+ISSS (2019)
Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi
A scalable stochastic number generator for phase change memory based in-memory stochastic processing: work-in-progress. CODES+ISSS (2019)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Varun Bhat, Sudeep Pasricha
SOTERIA: exploiting process variations to enhance hardware security with photonic NoC architectures. DAC (2018)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha
HYDRA: Heterodyne Crosstalk Mitigation With Double Microring Resonators and Data Encoding for Photonic NoCs. IEEE Trans. Very Large Scale Integr. Syst. 26 (1) (2018)
Ishan G. Thakkar, Sudeep Pasricha
Mitigating the Energy Impacts of VBTI Aging in Photonic Networks-on-Chip Architectures with Multilevel Signaling. IGSC (2018)
Sudeep Pasricha, Sai Vineel Reddy Chittamuru, Ishan G. Thakkar
Cross-Layer Thermal Reliability Management in Silicon Photonic Networks-on-Chip. ACM Great Lakes Symposium on VLSI (2018)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha
LIBRA: Thermal and Process Variation Aware Reliability Management in Photonic Networks-on-Chip. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)
Sudeep Pasricha, Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Varun Bhat
Securing Photonic NoC Architectures from Hardware Trojans. NOCS (2018)
Ishan G. Thakkar, Sudeep Pasricha
DyPhase: A Dynamic Phase Change Memory Architecture With Symmetric Write Latency and Restorable Endurance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (9) (2018)
Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha
Improving the Reliability and Energy-Efficiency of High-Bandwidth Photonic NoC Architectures with Multilevel Signaling. NOCS (2017)
Ishan G. Thakkar, Sudeep Pasricha
DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency. VLSI Design (2017)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha
Analyzing voltage bias and temperature induced aging effects in photonic interconnects for manycore computing. SLIP (2017)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha
Process variation aware crosstalk mitigation for DWDM based photonic NoC architectures. ISQED (2016)
Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha
PICO: mitigating heterodyne crosstalk due to process variations and intermodulation effects in photonic NoCs. DAC (2016)
Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha
A Comparative Analysis of Front-End and Back-End Compatible Silicon Photonic On-Chip Interconnects. SLIP (2016)
Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha
Mitigation of homodyne crosstalk noise in silicon photonic NoC architectures with tunable decoupling. CODES+ISSS (2016)
Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha
Run-time laser power management in photonic NoCs with on-chip semiconductor optical amplifiers. NOCS (2016)
Ishan G. Thakkar, Sudeep Pasricha
Massed Refresh: An Energy-Efficient Technique to Reduce Refresh Overhead in Hybrid Memory Cube Architectures. VLSI Design (2016)
Ishan G. Thakkar, Sudeep Pasricha
3D-ProWiz: An Energy-Efficient and Optically-Interfaced 3D DRAM Architecture with Reduced Data Access Overhead. IEEE Trans. Multi Scale Comput. Syst. 1 (3) (2015)
Ishan G. Thakkar, Sudeep Pasricha
A novel 3D graphics DRAM architecture for high-performance and low-energy memory accesses. ICCD (2015)
Ishan G. Thakkar, Sudeep Pasricha
3-D WiRED: A Novel WIDE I/O DRAM With Energy-Efficient 3-D Bank Organization. IEEE Des. Test 32 (4) (2015)
Ishan G. Thakkar, Sudeep Pasricha
3D-Wiz: A novel high bandwidth, optically interfaced 3D DRAM architecture with reduced random access time. ICCD (2014)