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Inhak Han
Publication Activity (10 Years)
Years Active: 2011-2019
Publications (10 Years): 5
Top Topics
Master Slave
Clock Gating
Multiple Input
Flip Flops
Top Venues
ICICDT
ASP-DAC
ACM Trans. Design Autom. Electr. Syst.
ICCAD
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Publications
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Yonghwi Kwon
,
Inhak Han
,
Youngsoo Shin
Clock Gating Synthesis of Netlist with Cyclic Logic Paths.
ICCAD
(2019)
Yonghwi Kwon
,
Jinwook Jung
,
Inhak Han
,
Youngsoo Shin
Transient Clock Power Estimation of Pre-CTS Netlist.
ISCAS
(2018)
Inhak Han
,
Youngsoo Shin
Folded Circuit Synthesis: Min-Area Logic Synthesis Using Dual-Edge-Triggered Flip-Flops.
ACM Trans. Design Autom. Electr. Syst.
23 (5) (2018)
Inhak Han
,
Jonggyu Kim
,
Joonhwan Yi
,
Youngsoo Shin
Register grouping for synthesis of clock gating logic.
ICICDT
(2016)
Inhak Han
,
Daijoon Hyun
,
Youngsoo Shin
Buffer insertion to remove hold violations at multiple process corners.
ASP-DAC
(2016)
Inhak Han
,
Youngsoo Shin
Simplifying Clock Gating Logic by Matching Factored Forms.
IEEE Trans. Very Large Scale Integr. Syst.
22 (6) (2014)
Inhak Han
,
Youngsoo Shin
Folded circuit synthesis: Logic simplification using dual edge-triggered flip-flops.
ICICDT
(2013)
Inhak Han
,
Youngsoo Shin
Synthesis of clock gating logic through factored form matching.
ICICDT
(2012)
Seungwhun Paik
,
Inhak Han
,
Sangmin Kim
,
Youngsoo Shin
Clock Gating Synthesis of Pulsed-Latch Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
31 (7) (2012)
Jaeha Kung
,
Inhak Han
,
Sachin S. Sapatnekar
,
Youngsoo Shin
Thermal signature: a simple yet accurate thermal index for floorplan optimization.
DAC
(2011)
Sangmin Kim
,
Inhak Han
,
Seungwhun Paik
,
Youngsoo Shin
Pulser gating: A clock gating of pulsed-latch circuits.
ASP-DAC
(2011)