Ilya Ganusov

Publication Activity (10 Years)

Years Active: 2004-2021
Publications (10 Years): 6

Top Topics

Field Programmable Gate Array

Hardware Architecture

Hardware Design

Hardware Implementation

Top Venues

Hot Chips Symposium

Publications

Grace Zgheib, Yu Shen Lu, Ilya Ganusov
Clock Skew Scheduling: Avoiding the Runtime Cost of Mixed-Integer Linear Programming. FPL (2021)
Jeffrey Chromczak, Mark Wheeler, Charles Chiasson, Dana How, Martin Langhammer, Tim Vanderhoek, Grace Zgheib, Ilya Ganusov
Architectural Enhancements in Intel® Agilex™ FPGAs. FPGA (2020)
Sagheer Ahmad, Vamsi Boppana, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig
A 16-nm Multiprocessing System-on-Chip Field-Programmable Gate Array Platform. IEEE Micro 36 (2) (2016)
Ilya Ganusov, Henri Fraisse, Aaron Ng, Rafael Trapani Possignolo, Sabya Das
Automated extra pipeline analysis of applications mapped to Xilinx UltraScale+ FPGAs. FPL (2016)
Ilya Ganusov, Benjamin Devlin
Time-borrowing platform in the Xilinx UltraScale+ family of FPGAs and MPSoCs. FPL (2016)
Vamsi Boppana, Sagheer Ahmad, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig
UltraScale+ MPSoC and FPGA families. Hot Chips Symposium (2015)
Ilya Ganusov, Martin Burtscher
Future execution: A prefetching mechanism that uses multiple cores to speed up single threads. ACM Trans. Archit. Code Optim. 3 (4) (2006)
Ilya Ganusov, Martin Burtscher
Efficient emulation of hardware prefetchers via event-driven helper threading. PACT (2006)
Ilya Ganusov, Martin Burtscher
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors. IEEE PACT (2005)
Christianto C. Liu, Ilya Ganusov, Martin Burtscher, Sandip Tiwari
Bridging the Processor-Memory Performance Gapwith 3D IC Technology. IEEE Des. Test Comput. 22 (6) (2005)
Ilya Ganusov, Martin Burtscher
On the importance of optimizing the configuration of stream prefetchers. Memory System Performance (2005)
Martin Burtscher, Ilya Ganusov, Sandra J. Jackson, Jian Ke, Paruj Ratanaworabhan, Nana B. Sam
The VPC Trace-Compression Algorithms. IEEE Trans. Computers 54 (11) (2005)
Martin Burtscher, Ilya Ganusov
Automatic Synthesis of High-Speed Processor Simulators. MICRO (2004)