Giorgiomaria Cicero

Publication Activity (10 Years)

Years Active: 2018-2023
Publications (10 Years): 11

Top Topics

Virtual Machine

Fragile Watermarking Scheme

Heterogeneous Platforms

Top Venues

IEEE Embed. Syst. Lett.

Publications

Edoardo Cittadini, Mauro Marinoni, Alessandro Biondi, Giorgiomaria Cicero, Giorgio C. Buttazzo
Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology. Real Time Syst. 59 (4) (2023)
Niccolò Borgioli, Matteo Zini, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
An I/O Virtualization Framework With I/O-Related Memory Contention Control for Real-Time Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Gabriele Serra, Pietro Fara, Giorgiomaria Cicero, Francesco Restuccia, Alessandro Biondi
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms. RTAS (2022)
Matteo Zini, Giorgiomaria Cicero, Daniel Casini, Alessandro Biondi
Profiling and controlling I/O-related memory contention in COTS heterogeneous platforms. Softw. Pract. Exp. 52 (5) (2022)
Daniel Casini, Alessandro Biondi, Giorgiomaria Cicero, Giorgio C. Buttazzo
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems. RTAS (2021)
Alessandro Biondi, Daniel Casini, Giorgiomaria Cicero, Niccolò Borgioli, Giorgio C. Buttazzo, Gaetano Patti, Luca Leonardi, Lucia Lo Bello, Marco Solieri, Paolo Burgio, Ignacio Sanudo Olmedo, Angelo Ruocco, Luca Palazzi, Marko Bertogna, Alessandro Cilardo, Nicola Mazzocca, Antonino Mazzeo
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms. IEEE Access 9 (2021)
Luca Belluardo, Andrea Stevanato, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving. RTCSA (2021)
Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, Giorgiomaria Cicero, Giorgio C. Buttazzo
AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC. DAC (2020)
Alessandro Biondi, Federico Nesti, Giorgiomaria Cicero, Daniel Casini, Giorgio C. Buttazzo
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems. IEEE Embed. Syst. Lett. 12 (3) (2020)
Giulia Ferri, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
Towards the Hypervision of Hardware-based Control Flow Integrity for Arm Platforms. ITASEC (2019)
Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo, Anup Patel
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone. ICIT (2018)