PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms.
Gabriele SerraPietro FaraGiorgiomaria CiceroFrancesco RestucciaAlessandro BiondiPublished in: RTAS (2022)
Keyphrases
- control flow
- data flow
- integrity verification
- field programmable gate array
- hardware software co design
- process model
- software testing
- transition systems
- fragile watermarking scheme
- high speed
- business process models
- hardware implementation
- workflow management systems
- embedded systems
- hardware and software
- modeling language
- fragile watermarking
- low power
- low cost
- data structure
- artificial intelligence
- formal semantics
- object oriented
- decision trees
- test cases
- operating system
- data model