Fu-Wei Chen

Publication Activity (10 Years)

Years Active: 2008-2019
Publications (10 Years): 1

Top Topics

Tree Structures

Multiresolution

High Availability

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Yen-Hao Chen, Po-Chen Huang, Fu-Wei Chen, Allen C.-H. Wu, TingTing Hwang
Crosstalk-aware TSV-buffer Insertion in 3D IC. SoCC (2019)
Fu-Wei Chen, Hui-Ling Ting, TingTing Hwang
Fault-tolerant TSV by using scan-chain test TSV. ASP-DAC (2014)
Fu-Wei Chen, TingTing Hwang
Clock-Tree Synthesis with Methodology of Reuse in 3D-IC. ACM J. Emerg. Technol. Comput. Syst. 10 (3) (2014)
Fu-Wei Chen, Shih-Liang Chen, Yung-Sheng Lin, TingTing Hwang
A Physical-Location-Aware X-Bit Redistribution for Maximum IR-Drop Reduction. IEEE Trans. Very Large Scale Integr. Syst. 20 (12) (2012)
Fu-Wei Chen, TingTing Hwang
Clock tree synthesis with methodology of re-use in 3D IC. DAC (2012)
Fu-Wei Chen, Shih-Liang Chen, Yung-Sheng Lin, TingTing Hwang
A physical-location-aware fault redistribution for maximum IR-drop reduction. ASP-DAC (2011)
Fu-Wei Chen, Yi-Yu Liu
Performance-Driven Dual-Rail Routing Architecture for Structured ASIC Design Style. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Po-Yang Hsu, Shu-Ting Lee, Fu-Wei Chen, Yi-Yu Liu
Buffer design and optimization for lut-based structured ASIC design styles. ACM Great Lakes Symposium on VLSI (2009)
Fu-Wei Chen, Yi-Yu Liu
Performance-driven dual-rail insertion for chip-level pre-fabricated design. DATE (2009)
Fu-Wei Chen, Yi-Yu Liu
Wire Sizing Alternative - An Uniform Dual-rail Routing Architecture. DATE (2008)