Dmitry Ponomarev

Publication Activity (10 Years)

Years Active: 2001-2022
Publications (10 Years): 21

Top Topics

Malware Detection

Top Venues

IEEE Trans. Computers

Publications

Anton Arnold, Sjoerd Geevers, Ilaria Perugia, Dmitry Ponomarev
On the limiting amplitude principle for the wave equation with variable coefficients. CoRR (2022)
Ali Eker, David Timmerman, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
GVT-Guided Demand-Driven Scheduling in Parallel Discrete Event Simulation. ICPP (2021)
Barry Williams, Ali Eker, Kenneth Chiu, Dmitry Ponomarev
High-Performance PDES on Manycore Clusters. SIGSIM-PADS (2021)
Anton Arnold, Sjoerd Geevers, Ilaria Perugia, Dmitry Ponomarev
An adaptive finite element method for high-frequency scattering problems with variable coefficients. CoRR (2021)
Khaled N. Khasawneh, Meltem Ozsoy, Caleb Donovick, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
EnsembleHMD: Accurate Hardware Malware Detectors with Specialized Ensemble Classifiers. IEEE Trans. Dependable Secur. Comput. 17 (3) (2020)
Aisha Hasan, Ryan Riley, Dmitry Ponomarev
Port or Shim? Stress Testing Application Performance on Intel SGX. IISWC (2020)
Ali Eker, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
Demand-Driven PDES: Exploiting Locality in Simulation Models. SIGSIM-PADS (2020)
Khaled N. Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation. DAC (2019)
Atsuko Shimizu, Daniel Townley, Mohit Joshi, Dmitry Ponomarev
EA-PLRU: Enclave-Aware Cache Replacement. HASP@ISCA (2019)
Daniel Townley, Khaled N. Khasawneh, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Lei Yu
LATCH: A Locality-Aware Taint CHecker. MICRO (2019)
Ali Eker, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
Controlled Asynchronous GVT: Accelerating Parallel Discrete Event Simulation on Many-Core Clusters. ICPP (2019)
Daniel Townley, Dmitry Ponomarev
SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors. PACT (2019)
Dmitry Evtyushkin, Ryan Riley, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
BranchScope: A New Side-Channel Attack on Directional Branch Predictor. ASPLOS (2018)
Dmitry Evtyushkin, Jesse Elwell, Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Ryan Riley
Flexible Hardware-Managed Isolated Execution: Architecture, Software Support and Applications. IEEE Trans. Dependable Secur. Comput. 15 (3) (2018)
Khaled N. Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation. CoRR (2018)
Ali Eker, Barry Williams, Nitesh Mishra, Dushyant Thakur, Kenneth Chiu, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
Performance Implications of Global Virtual Time Algorithms on a Knights Landing Processor. DS-RT (2018)
Barry Williams, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Philip A. Wilsey
Performance Characterization of Parallel Discrete Event Simulation on Knights Landing Processor. SIGSIM-PADS (2017)
Jesse Elwell, Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Ryan Riley
Hardening extended memory access control schemes with self-verified address spaces. ICCAD (2017)
Khaled N. Khasawneh, Nael B. Abu-Ghazaleh, Dmitry Ponomarev, Lei Yu
RHMD: evasion-resilient hardware malware detectors. MICRO (2017)
Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
Understanding and Mitigating Covert Channels Through Branch Predictors. ACM Trans. Archit. Code Optim. 13 (1) (2016)
Meltem Ozsoy, Khaled N. Khasawneh, Caleb Donovick, Iakov Gorelik, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Hardware-Based Malware Detection Using Low-Level Architectural Features. IEEE Trans. Computers 65 (11) (2016)
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Tameesh Suri
SIFT: Low-Complexity Energy-Efficient Information Flow Tracking on SMT Processors. IEEE Trans. Computers 63 (2) (2014)
Jesse Elwell, Ryan Riley, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks. HPCA (2014)
Mehmet Kayaalp, Meltem Ozsoy, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Efficiently Securing Systems from Code Reuse Attacks. IEEE Trans. Computers 63 (5) (2014)
Jingjing Wang, Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Parallel Discrete Event Simulation for Multi-Core Systems: Analysis and Optimization. IEEE Trans. Parallel Distributed Syst. 25 (6) (2014)
Jingjing Wang, Ketan Bahulkar, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
Can PDES scale in environments with heterogeneous delays? SIGSIM-PADS (2013)
Alexey Baranov, Peter Panfilov, Dmitry Ponomarev
PowerVisor: A Toolset for Visualizing Energy Consumption and Heat Dissipation Processes in Modern Processor Architectures. PaCT (2013)
Jingjing Wang, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Interference resilient PDES on multi-core systems: towards proportional slowdown. SIGSIM-PADS (2013)
Mehmet Kayaalp, Timothy Schmitt, Junaid Nomani, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
SCRAP: Architecture for signature-based protection from Code Reuse Attacks. HPCA (2013)
Mehmet Kayaalp, Meltem Ozsoy, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Branch regulation: Low-overhead protection from code reuse attacks. ISCA (2012)
Leonid Domnitser, Aamer Jaleel, Jason Loew, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Dmitry Ponomarev
Tensor model of IMS network. ICUMT (2012)
Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Optimization of Parallel Discrete Event Simulator for Multi-core Systems. IPDPS (2012)
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Tameesh Suri
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors. Conf. Computing Frontiers (2011)
Dmitry Evtyushkin, Peter Panfilov, Dmitry Ponomarev
CacheVisor: A Toolset for Visualizing Shared Caches in Multicore and Multithreaded Processors. PaCT (2011)
Jared Schmitz, Jason Loew, Jesse Elwell, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
TPM-SIM: a framework for performance evaluation of trusted platform modules. DAC (2011)
Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick H. Madden
Mathematical limits of parallel computation for embedded systems. ASP-DAC (2011)
Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick H. Madden
A co-processor approach for accelerating data-structure intensive algorithms. ICCD (2010)
Ketan Bahulkar, Nicole Hofmann, Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
Performance Evaluation of PDES on Multi-core Clusters. DS-RT (2010)
Jason Loew, Dmitry Ponomarev, Patrick H. Madden
Customized architectures for faster route finding in GPS-based navigation systems. SASP (2010)
Leonid Domnitser, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
A Predictive Model for Cache-Based Side Channels in Multicore and Multithreaded Microprocessors. MMM-ACNS (2010)
Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev
Energy-efficient renaming with register versioning. ISLPED (2009)
Hui Zeng, Kanad Ghose, Dmitry Ponomarev
Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures. ICPP (2009)
Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev
MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. SIGARCH Comput. Archit. News 37 (2) (2009)
Jason Loew, Dmitry Ponomarev
Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt? SBAC-PAD (2008)
Vladimir Krylov, Andrey Logvinov, Alexander Ponomarenko, Dmitry Ponomarev
Metrized Small World Properties Based Data Structure. SEDE (2008)
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
Selective Writeback: Reducing Register File Pressure and Energy Consumption. IEEE Trans. Very Large Scale Integr. Syst. 16 (6) (2008)
Jason Loew, Dmitry Ponomarev
Two-Level Reorder Buffers: Accelerating Memory-Bound Applications on SMT Architectures. ICPP (2008)
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. PACT (2006)
Joseph J. Sharkey, Dmitry Ponomarev
Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch. ICPP (2006)
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
Adaptive reorder buffers for SMT processors. PACT (2006)
Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
Early Register Deallocation Mechanisms Using Checkpointed Register Files. IEEE Trans. Computers 55 (9) (2006)
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal
Address-Value Decoupling for Early Register Deallocation. ICPP (2006)
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
Selective writeback: exploiting transient values for energy-efficiency and performance. ISLPED (2006)
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. IEEE Trans. Computers 53 (6) (2004)
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. PACS (2004)
Dmitry Ponomarev, Vladimir Krylov
Web Mapping of Real-World Things and its Applications - Product WEBID as a Driving Force for new Supply Chains. ICETE (1) (2004)
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
Reducing Datapath Energy through the Isolation of Short-Lived Operands. IEEE PACT (2003)
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
Reducing reorder buffer complexity through selective operand caching. ISLPED (2003)
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
Distributed Reorder Buffer Schemes for Low Power. ICCD (2003)
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
Energy Efficient Register Renaming. PATMOS (2003)
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
Power efficient comparators for long arguments in superscalar processors. ISLPED (2003)
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
Energy-Efficient Design of the Reorder Buffer. PATMOS (2002)
Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose
Low-complexity reorder buffer architecture. ICS (2002)
Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. ICCD (2002)
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors. DATE (2002)
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. MICRO (2001)
Dmitry Ponomarev, Kanad Ghose, Evgeny Saksonov
Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters. Euro-Par (2001)
Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge
Energy: efficient instruction dispatch buffer design for superscalar processors. ISLPED (2001)