Bernhard Eschermann

Publication Activity (10 Years)

Years Active: 1988-1996
Publications (10 Years): 0

Publications

Silke Draber, Bernhard Eschermann
Dependability Evaluation of a Computing System for Traction Control of Electrical Locomotives. EDCC (1996)
Bernhard Eschermann, Hubert D. Kirrmann
Fail-Safe On-Board Communication for Automatic Train Protection. GI Jahrestagung (1994)
Bernhard Eschermann
State Assignment for Hardwired VLSI Control Units. ACM Comput. Surv. 25 (4) (1993)
Bernhard Eschermann
Enhancing on-line testability during synthesis. J. Electron. Test. 4 (1) (1993)
Bernhard Eschermann
An implicitly testable boundary scan TAP controller. J. Electron. Test. 3 (2) (1992)
Bernhard Eschermann
On Combining Off-Line BIST and On-Line Control Flow Checking. FTCS (1992)
Bernhard Eschermann, Hans-Joachim Wunderlich
Optimized synthesis techniques for testable sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (3) (1992)
Bernhard Eschermann
Synthesis and self-test of random logic control units. Integr. 13 (3) (1992)
Bernhard Eschermann, Hans-Joachim Wunderlich
Emulation of Scan Paths in Sequential Circuit Synthesis. Fault-Tolerant Computing Systems (1991)
Bernhard Eschermann, Hans-Joachim Wunderlich
A Unified Approach for the Synthesis of Self-Testable Finite State Machines. DAC (1991)
Juergen Froessl, Bernhard Eschermann
Module Generation for AND/XOR Fields (XPLAs). ICCD (1991)
Bernhard Eschermann, Hans-Joachim Wunderlich
Optimized synthesis of self-testable finite state machines. FTCS (1990)
Rainer Amann, Bernhard Eschermann, Utz G. Baitinger
PLA based finite state machines using Johnson counters as state memories. ICCD (1988)
Bernhard Eschermann, Wayne Wei-Ming Dai, Ernest S. Kuh, Massoud Pedram
Hierarchical placement for macrocells: a 'meet in the middle' approach. ICCAD (1988)