Anup P. Jose

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 2

Top Topics

Spatial And Temporal Resolution

Ultra Low Power

Gaze Contingent

Top Venues

IEEE J. Solid State Circuits

VLSI Technology and Circuits

Publications

Mohamed Badr Younis, Mostafa Gamal Ahmed, Tianyu Wang, Ahmed E. AbdelRahman, Mahmoud A. Khalil, Anup P. Jose, Pavan Kumar Hanumolu
A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data Recovery Loop. VLSI Technology and Circuits (2023)
Tianyu Wang, Da Wei, Ranick Ng, Gaurav Malhotra, Anup P. Jose, Amir Amirkhany, Pavan Kumar Hanumolu
A 5.2 Gb/s Receiver for Next-Generation 8K Displays in 180 nm CMOS Process. IEEE J. Solid State Circuits 57 (8) (2022)
Yohan Frans, Declan Carey, Marc Erett, Hesam Amir Aslanzadeh, Wayne Y. Fang, Didem Turker, Anup P. Jose, Adebabay Bekele, Jay Im, Parag Upadhyaya, Zhaoyin Daniel Wu, Kenny C.-H. Hsieh, Jafar Savoj, Ken Chang
A 0.5-16.3 Gb/s Fully Adaptive Flexible-Reach Transceiver for FPGA in 20 nm CMOS. IEEE J. Solid State Circuits 50 (8) (2015)
Parag Upadhyaya, Jafar Savoj, Fu-Tai An, Ade Bekele, Anup P. Jose, Bruce Xu, Zhaoyin Daniel Wu, Didem Turker, Hesam Amir Aslanzadeh, Hiva Hedayati, Jay Im, Siok-Wei Lim, Stanley Chen, Toan Pham, Yohan Frans, Ken Chang
3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS. ISSCC (2015)
Jafar Savoj, Hesam Amir Aslanzadeh, Declan Carey, Marc Erett, Wayne Fang, Yohan Frans, Kenny C.-H. Hsieh, Jay Im, Anup P. Jose, Didem Turker, Parag Upadhyaya, Zhaoyin Daniel Wu, Ken Chang
Wideband flexible-reach techniques for a 0.5-16.3Gb/s fully-adaptive transceiver in 20nm CMOS. CICC (2014)
Jafar Savoj, Kenny C.-H. Hsieh, Fu-Tai An, J. Gong, Jay Im, Xuewen Jiang, Anup P. Jose, Vassili Kireev, Siok-Wei Lim, Arianne Roldan, D. Z. Turker, Parag Upadhyaya, Zhaoyin Daniel Wu, Ken Chang
A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs. IEEE J. Solid State Circuits 48 (11) (2013)
Anup P. Jose, Kenneth L. Shepard
Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication. IEEE J. Solid State Circuits 42 (6) (2007)
Anup P. Jose, George Patounakis, Kenneth L. Shepard
Pulsed current-mode signaling for nearly speed-of-light intrachip communication. IEEE J. Solid State Circuits 41 (4) (2006)
Anup P. Jose, Kenneth L. Shepard
Distributed Loss Compensation for Low-latency On-chip Interconnects. ISSCC (2006)
Keith A. Jenkins, Anup P. Jose, David F. Heidel
An on-chip jitter measurement circuit with sub-picosecond resolution. ESSCIRC (2005)
Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds
On-Chip Spectrum Analyzer for Analog Built-In Self Test. VTS (2005)
Yee William Li, George Patounakis, Anup P. Jose, Kenneth L. Shepard, Steven M. Nowick
Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application. ASYNC (2003)