A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs.
Jafar SavojKenny C.-H. HsiehFu-Tai AnJ. GongJay ImXuewen JiangAnup P. JoseVassili KireevSiok-Wei LimArianne RoldanD. Z. TurkerParag UpadhyayaZhaoyin Daniel WuKen ChangPublished in: IEEE J. Solid State Circuits (2013)
Keyphrases
- low power
- low cost
- embedded systems
- cmos technology
- ultra low power
- wireless transmission
- field programmable gate array
- high speed
- hardware software
- nm technology
- single chip
- reconfigurable hardware
- digital signal processing
- hardware and software
- smart camera
- power reduction
- low power consumption
- real time
- wireless networks
- digital camera
- high power
- low voltage
- vlsi circuits
- logic circuits
- vlsi architecture
- image sensor
- highly efficient
- power consumption
- data acquisition
- rfid tags
- gate array
- mixed signal
- signal processor