Alan J. Coppola

Publication Activity (10 Years)

Years Active: 1986-2008
Publications (10 Years): 0

Publications

Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov
OpenFPGA CoreLib core library interoperability effort. Parallel Comput. 34 (4-5) (2008)
William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Andrew A. Kennings, Alan J. Coppola
Segmented channel routability via satisfiability. ACM Trans. Design Autom. Electr. Syst. 9 (4) (2004)
Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Andrew A. Kennings, Alan J. Coppola
Board-level multiterminal net assignment for the partial cross-bar architecture. IEEE Trans. Very Large Scale Integr. Syst. 11 (3) (2003)
Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Alan J. Coppola, Andrew A. Kennings
Board-level multiterminal net assignment. ACM Great Lakes Symposium on VLSI (2002)
William N. N. Hung, Xiaoyu Song, Alan J. Coppola, Andrew A. Kennings
On segmented channel routability. ISCAS (1) (2002)
Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Bart Massey, Pawel Kerntopf, Andrzej Buller, Lech Józwiak, Alan J. Coppola
Regular Realization of Symmetric Functions Using Reversible Logic. DSD (2001)
Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Edmund Pierzchala, Alan J. Coppola
An Exact Solution to the Fitting Problem in the Application Specific State Machine Device. J. Circuits Syst. Comput. 4 (2) (1994)
Alan J. Coppola, Marek A. Perkowski, Robert Anderson, Jeffrey S. Freedman, Edmund Pierzchala
Tokenized State Machine Model for Synthesis of Sequential Circuits into EPLDs and FPGAs. Synthesis for Control Dominated Circuits (1992)
Alan J. Coppola
New Methods in the Analysis of Logic Minimization Data and Algorithms. DAC (1989)
Alan J. Coppola
An implementation of a state assignment heuristic. DAC (1986)