Aiman El-Maleh

Publication Activity (10 Years)

Years Active: 1992-2023
Publications (10 Years): 7

Top Topics

Optimization Process

Reconfigurable Hardware

Top Venues

J. Supercomput.

Publications

Sadiq M. Sait, Aiman El-Maleh, Mohammad Altakrouri, Ahmad Shawahna
Optimization of FPGA-based CNN accelerators using metaheuristics. J. Supercomput. 79 (4) (2023)
Ahmad Shawahna, Sadiq M. Sait, Aiman El-Maleh, Irfan Ahmad
FxP-QNet: A Post-Training Quantizer for the Design of Mixed Low-Precision DNNs with Dynamic Fixed-Point Representation. CoRR (2022)
Ahmad Shawahna, Sadiq M. Sait, Aiman El-Maleh, Irfan Ahmad
FxP-QNet: A Post-Training Quantizer for the Design of Mixed Low-Precision DNNs With Dynamic Fixed-Point Representation. IEEE Access 10 (2022)
Sadiq M. Sait, Aiman El-Maleh, Mohammad Altakrouri, Ahmad Shawahna
Optimization of FPGA-based CNN Accelerators Using Metaheuristics. CoRR (2022)
Ahmad Shawahna, Sadiq M. Sait, Aiman El-Maleh
FPGA-based Accelerators of Deep Learning Networks for Learning and Classification: A Review. CoRR (2019)
Ahmad Shawahna, Sadiq M. Sait, Aiman El-Maleh
FPGA-Based Accelerators of Deep Learning Networks for Learning and Classification: A Review. IEEE Access 7 (2019)
Muhammad E. S. Elrabaa, Amran Al-Aghbari, Mohammed Alasli, Aiman El-Maleh, Abdelhafid Bouhraoua, Mohammad Alshayeb
A low-cost platform for the prototyping and characterization of digital circuit IPs. Integr. 54 (2016)
Wenfa Zhan, Aiman El-Maleh
A new scheme of test data compression based on equal-run-length coding (ERLC). Integr. 45 (1) (2012)
Aiman El-Maleh, Saif al Zahir, Esam Khan
Test data compression based on geometric shapes. Comput. Electr. Eng. 37 (3) (2011)
Wenfa Zhan, Aiman El-Maleh
A new collaborative scheme of test vector compression based on equal-run-length coding (ERLC). CSCWD (2009)
Esa Alghonaim, Aiman El-Maleh, Mohamed Adnan Landolsi
Using input/output queues to increase LDPC decoder performance. AICCSA (2008)
Esa Alghonaim, Aiman El-Maleh, Mohamed Adnan Landolsi
New Technique for Improving Performance of LDPC Codes in the Presence of Trapping Sets. EURASIP J. Wirel. Commun. Netw. 2008 (2008)
Aiman El-Maleh, S. Saqib Khursheed
Efficient test compaction for combinational circuits based on Fault detection count-directed clustering. IET Comput. Digit. Tech. 1 (4) (2007)
Aiman El-Maleh
An efficient test vector compression technique based on block merging. ISCAS (2006)
Aiman El-Maleh, Ali Al-Suwaiyan
An Efficient Test Relaxation Technique for Combinational & Full-Scan Sequential Circuits. VTS (2002)
Aiman El-Maleh, Ali Al-Suwaiyan
An efficient test relaxation technique for combinational circuits based on critical path tracing. ICECS (2002)
Aiman El-Maleh, Esam Khan, Saif al Zahir
A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip. VTS (2001)
Saif al Zahir, Aiman El-Maleh, Esam Khan
An efficient test vector compression technique based on geometric shapes [system-on-a-chip]. ICECS (2001)
Thomas E. Marchok, Aiman El-Maleh, Wojciech Maly, Janusz Rajski
Complexity of sequential ATPG. ED&TC (1995)
Aiman El-Maleh, Janusz Rajski
Delay-fault testability preservation of the concurrent decomposition and factorization transformations. VTS (1994)
Janusz Rajski, Jagadeesh Vasudevamurthy, Aiman El-Maleh
Recent advances in logic synthesis with testability. VTS (1992)