Login / Signup

Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding.

Mustafa BadarogluKris TiriGeert Van der PlasPiet WambacqIngrid VerbauwhedeStéphane DonnayGeorges G. E. GielenHugo De Man
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2006)
Keyphrases