Impact of Passive & Active Load Gate Impedance on Breakdown Hardness in 28nm FDSOI Technology.
A. P. NguyenXavier GarrosM. RafikFlorian CachoDavid RoyXavier FederspielF. GaillardPublished in: IRPS (2019)
Keyphrases
- cmos technology
- leakage current
- low voltage
- metal oxide semiconductor
- nm technology
- cost effective
- low power
- load balancing
- rapid development
- information theoretic
- factors that influence
- data processing
- power consumption
- web services
- personal computer
- low cost
- worst case
- computational complexity
- transmission line
- computer systems