Guidelines for mitigating NBTI degradation in on-chip memories.
Yuji KunitakeToshinori SatoHiroto YasuuraTakanori HayashidaPublished in: ISCIT (2012)
Keyphrases
- low cost
- high speed
- digital signal processors
- analog vlsi
- vlsi implementation
- risk management
- programmable logic
- vlsi design
- evolvable hardware
- associative memory
- single chip
- high density
- physical design
- functional verification
- design guidelines
- focal plane
- circuit design
- solid models
- host computer
- ibm zenterprise
- design patterns