Takanori Hayashida

Publication Activity (10 Years)

Years Active: 2011-2013
Publications (10 Years): 0

Top Topics

Ibm Zenterprise

Power Consumption

Error Tolerance

Top Venues

Publications

Ken Yano, Takanori Hayashida, Toshinori Sato
Improving timing error tolerance without impact on chip area and power consumption. ISQED (2013)
Yuji Kunitake, Toshinori Sato, Hiroto Yasuura, Takanori Hayashida
A Selective Replacement Method for Timing-Error-Predicting flip-Flops. J. Circuits Syst. Comput. 21 (6) (2012)
Toshinori Sato, Hideki Mori, Rikiya Yano, Takanori Hayashida
Importance of Single-Core Performance in the Multicore Era. ACSC (2012)
Toshinori Sato, Takanori Hayashida, Ken Yano
Dynamically reducing overestimated design margin of MultiCores. HPCS (2012)
Ken Yano, Takanori Hayashida, Toshinori Sato
Analysis of SER Improvement by Radiation Hardened Latches. PRDC (2012)
Yuji Kunitake, Toshinori Sato, Hiroto Yasuura, Takanori Hayashida
Guidelines for mitigating NBTI degradation in on-chip memories. ISCIT (2012)
Toshinori Sato, Takahito Yoshiki, Takanori Hayashida
Multicore Power Management Utilizing Error-Predicting Flip-flop. CISIS (2011)