Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor.
Takeshi KumakiMasakatsu IshizakiTetsushi KoideHans Jürgen MattauschYasuto KurodaHideyuki NodaKatsumi DosakaKazutami ArimotoKazunori SaitoPublished in: IEICE Trans. Inf. Syst. (2007)
Keyphrases
- processing elements
- single instruction multiple data
- massively parallel
- parallel architectures
- parallel processing
- parallel architecture
- parallel processors
- associative memory
- random access
- parallel computers
- computational power
- real time
- image processing algorithms
- hardware architecture
- hardware implementation
- single processor
- embedded systems
- direct memory access
- memory management
- parallel computing
- discrete cosine transform
- memory bandwidth
- compute intensive
- parallel implementation
- shared memory
- spatial domain
- parallel algorithm
- processor array
- mesh connected
- smart camera
- dynamic random access memory
- highly parallel
- parallel programming
- distributed memory
- parallel computation
- computer architecture
- data transfer
- watermarking algorithm
- singular value decomposition