Low Power Test Generation for Path Delay Faults.
Mahilchi Milir Vaseekar KumarSpyros TragoudasPublished in: J. Low Power Electron. (2005)
Keyphrases
- low power
- test generation
- test cases
- mutation testing
- power consumption
- power dissipation
- high speed
- low cost
- test sequences
- high power
- low power consumption
- static analysis
- software testing
- vlsi architecture
- vlsi circuits
- real time
- single chip
- digital signal processing
- quality assurance
- shortest path
- logic circuits
- wireless transmission
- test suite
- object oriented
- gate array
- image sensor
- cmos technology
- wireless networks
- case study