Testing CrossTalk Induced Delay Faults in Static CMOS Circuits Through Dynamic Timing Analysis.

Bipul Chandra Paul Kaushik Roy

Published in: ITC (2002)

Keyphrases

power dissipation
high speed
dynamic analysis
analog vlsi
delay insensitive
circuit design
test cases
dynamic routing
low power
vlsi circuits
fault diagnosis
software testing
low cost
fault model
dynamic environments
built in self test
infrared
fault models
cmos technology
focal plane
power supply