Testing of Switch Blocks in Three-Dimensional FPGA.

Takumi Hoshi Kazuteru Namba Hideo Ito

Published in: DFT (2009)

Keyphrases

three dimensional
high speed
test cases
range images
fractal image coding
hardware implementation
d objects
real time
image processing
software testing
real time image processing
test set
video sequences
block size
surface model
hardware architecture
variable size
neural network