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Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures.

Sriseshan SrikanthPaul G. RabbatEric R. HeinBobin DengThomas M. ConteErik DeBenedictisJeanine E. CookMichael P. Frank
Published in: HPCA (2018)
Keyphrases
  • error resilient
  • ultra low power
  • high quality
  • load balancing
  • user experience
  • low power
  • error detection
  • error resilience
  • reed solomon codes