Eric R. Hein

Publication Activity (10 Years)

Years Active: 2013-2020
Publications (10 Years): 10

Top Venues

CoRR

HPCA

ICRC

ACM Trans. Archit. Code Optim.

Georgia Institute of Technology, Atlanta, GA, USA (PHD)

Education History

Georgia Institute of Technology, Atlanta, GA, USA

PHD

Publications

Eric R. Hein, Srinivas Eswar, Abdurrahman Yasar, Jiajia Li, Jeffrey S. Young, Thomas M. Conte, Ümit V. Çatalyürek, Richard W. Vuduc, E. Jason Riedy, Bora Uçar
Programming Strategies for Irregular Algorithms on the Emu Chick. ACM Trans. Parallel Comput. 7 (4) (2020)
Eric R. Hein, Srinivas Eswar, Abdurrahman Yasar, Jiajia Li, Jeffrey S. Young, Thomas M. Conte, Ümit V. Çatalyürek, Rich Vuduc, E. Jason Riedy, Bora Uçar
Programming Strategies for Irregular Algorithms on the Emu Chick. CoRR (2019)
Jeffrey S. Young, Eric R. Hein, Srinivas Eswar, Patrick Lavin, Jiajia Li, E. Jason Riedy, Richard W. Vuduc, Tom Conte
A microbenchmark characterization of the Emu chick. Parallel Comput. 87 (2019)
Bobin Deng, Sriseshan Srikanth, Eric R. Hein, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook, Michael P. Frank
Extending Moore's Law via Computationally Error-Tolerant Computing. ACM Trans. Archit. Code Optim. 15 (1) (2018)
Eric R. Hein, Tom Conte, Jeffrey Young, Srinivas Eswar, Jiajia Li, Patrick Lavin, Richard W. Vuduc, E. Jason Riedy
An Initial Characterization of the Emu Chick. IPDPS Workshops (2018)
Jeffrey Young, Eric R. Hein, Srinivas Eswar, Patrick Lavin, Jiajia Li, E. Jason Riedy, Richard W. Vuduc, Tom Conte
A Microbenchmark Characterization of the Emu Chick. CoRR (2018)
Sriseshan Srikanth, Paul G. Rabbat, Eric R. Hein, Bobin Deng, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook, Michael P. Frank
Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures. HPCA (2018)
Rohit Varkey Thankachan, Eric R. Hein, Brian Paul Swenson, James P. Fairbanks
Integrating productivity-oriented programming languages with high-performance data structures. HPEC (2017)
Bobin Deng, Sriseshan Srikanth, Eric R. Hein, Paul G. Rabbat, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook
Computationally-redundant energy-efficient processing for y'all (CREEPY). ICRC (2016)
Sapan Agarwal, Jeanine E. Cook, Erik DeBenedictis, Michael P. Frank, Gert Cauwenberghs, Sriseshan Srikanth, Bobin Deng, Eric R. Hein, Paul G. Rabbat, Thomas M. Conte
Energy efficiency limits of logic and memory. ICRC (2016)
Brian P. Railing, Eric R. Hein, Thomas M. Conte
Contech: Efficiently Generating Dynamic Task Graphs for Arbitrary Parallel Programs. ACM Trans. Archit. Code Optim. 12 (2) (2015)
Jesse G. Beu, Jason A. Poovey, Eric R. Hein, Thomas M. Conte
High-speed formal verification of heterogeneous coherence hierarchies. HPCA (2013)

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Publication Activity (10 Years)

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Eric R. Hein