Universal test set generation for CMOS circuits.
Beyin ChenChung-Len LeePublished in: J. Electron. Test. (1995)
Keyphrases
- test set
- delay insensitive
- analog vlsi
- circuit design
- high speed
- error rate
- vlsi circuits
- training set
- training data
- test data
- evaluation methodology
- cmos technology
- chip design
- low power
- low cost
- class distribution
- power supply
- power dissipation
- power consumption
- low voltage
- random access memory
- learning algorithm
- training and test sets
- floating gate
- text classification
- random selection
- focal plane