Physical design guides for substrate noise reduction in CMOS digital circuits.
Makoto NagataJin NagaiKatsumasa HijikataTakashi MorieAtsushi IwataPublished in: IEEE J. Solid State Circuits (2001)
Keyphrases
- noise reduction
- digital circuits
- physical design
- circuit design
- chip design
- design methodology
- signal to noise ratio
- edge preserving
- query optimization
- evolvable hardware
- database administrators
- data flow
- edge detection
- high speed
- database
- noisy environments
- design tools
- median filter
- model based diagnosis
- finite state machines
- power consumption
- low cost
- low power
- speech enhancement
- databases
- database systems
- object oriented
- case study