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Soft Error Hardened Latch Scheme for Enhanced Scan Based Delay Fault Testing.

Takashi IkedaKazuteru NambaHideo Ito
Published in: DFT (2007)
Keyphrases
  • error rate
  • fault diagnosis
  • power consumption
  • error detection
  • neural network
  • fault model
  • error accumulation
  • data sets
  • low power
  • learning algorithm
  • fault injection
  • packet scheduling