Robustness evaluation and improvements under laser-based fault attacks of an AES crypto-processor implemented on a SRAM-based FPGA.
Gaetan CanivetP. MaistnRégis LeveugleFrédéric ValetteJessy ClédièreMarc RenaudinPublished in: ETS (2010)
Keyphrases
- advanced encryption standard
- fault model
- fpga device
- high speed
- security protocols
- cryptographic algorithms
- single chip
- fault diagnosis
- digital signal
- low power
- hardware implementation
- gate array
- low cost
- fault injection
- low power consumption
- parallel architecture
- fault detection
- power consumption
- s box
- systolic array
- signal processing