Delay Fault Testability on Two-Rail Logic Circuits.

Kazuteru Namba Hideo Ito

Published in: DFT (2008)

Keyphrases

logic circuits
power dissipation
low power
high speed
fault diagnosis
fault detection
functional decomposition
power consumption
gate array
tunnel diode
low cost
test data generation
logic synthesis
transmission line
computer vision
neural network
efficient implementation
massively parallel
real time