4.7 A 409GOPS/W adaptive and resilient domino register file in 22nm tri-gate CMOS featuring in-situ timing margin and error detection for tolerance to within-die variation, voltage droop, temperature and aging.
Jaydeep P. KulkarniCarlos TokunagaPaolo A. AseronTrang NguyenCharles AugustineJames W. TschanzVivek DePublished in: ISSCC (2015)
Keyphrases
- error detection
- cmos technology
- low voltage
- error correction
- leakage current
- low power
- nm technology
- power supply
- error recovery
- power consumption
- error correcting
- fault tolerance
- electric field
- low cost
- room temperature
- data cleansing
- metal oxide semiconductor
- high speed
- parallel processing
- error resilient
- bit rate
- electrical power
- power dissipation
- power system
- response time