A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS.

Jean-Olivier Plouchart Mark A. Ferriss Arun Natarajan Alberto Valdes-Garcia Bodhisatwa Sadhu Alexander V. Rylyakov Benjamin D. Parker Michael P. Beakes Aydin Babakhani Soner Yaldiz Lawrence T. Pileggi Ramesh Harjani Scott K. Reynolds José A. Tierno Daniel J. Friedman

Published in: CICC (2012)

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