Embedded Tutorial: Test Consideration for Nanometer Scale CMOS Circuits.
Kaushik RoyT. M. MakKwang-Ting ChengPublished in: VTS (2003)
Keyphrases
- analog vlsi
- high speed
- circuit design
- delay insensitive
- vlsi circuits
- low cost
- random access memory
- data sets
- neural network
- real time
- embedded systems
- cmos technology
- power supply
- built in self test
- low voltage
- focal plane
- single chip
- scale invariant
- image structure
- power consumption
- test data
- test cases
- signal processing
- case study