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8.6 A 6.5-to-23.3fJ/b/mm balanced charge-recycling bus in 16nm FinFET CMOS at 1.7-to-2.6Gb/s/wire with clock forwarding and low-crosstalk contraflow wiring.

John M. WilsonMatthew R. FojtikJohn W. PoultonXi ChenStephen G. TellThomas H. GreerC. Thomas GrayWilliam J. Dally
Published in: ISSCC (2016)
Keyphrases
  • high speed
  • metal oxide
  • low power
  • power consumption
  • cmos technology
  • real time
  • building blocks
  • power dissipation
  • rms error
  • nm technology
  • operating system
  • single chip
  • average error
  • transmission electron microscopy