Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks.
Naveen SudaVikas ChandraGanesh DasikaAbinash MohantyYufei MaSarma B. K. VrudhulaJae-sun SeoYu CaoPublished in: FPGA (2016)
Keyphrases
- convolutional neural networks
- field programmable gate array
- hardware implementation
- convolutional network
- real life
- response time
- small scale
- parallel computing
- high speed
- hardware architecture
- fpga implementation
- real time
- hardware design
- parallel algorithm
- parallel implementation
- image processing algorithms
- real world
- data acquisition
- embedded systems
- operating system
- signal processing
- compute intensive
- low cost