Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions.

Vishal Suthar Shantanu Dutt

Published in: VTS (2006)

Keyphrases

fault diagnosis
fault detection
high speed
field programmable gate array
neural network
database
multiple faults
fpga implementation
real time
low cost
source code
parallel architectures
simplifying assumptions
hardware software
fault model