21.5-dBm power-handling 5-GHz transmit/receive CMOS switch realized by voltage division effect of stacked transistor configuration with depletion-layer-extended transistors (DETs).
Takahiro OhnakadoSatoshi YamakawaTakaaki MurakamiAkihiko FurukawaEiji TaniguchiHiro-omi UedaNoriharu SuematsuTatsuo OomoriPublished in: IEEE J. Solid State Circuits (2004)
Keyphrases
- high speed
- low power
- power consumption
- high power
- power dissipation
- clock gating
- silicon dioxide
- energy dissipation
- cmos technology
- low voltage
- circuit design
- power supply
- power management
- power reduction
- clock frequency
- metal oxide semiconductor
- duty cycle
- space charge
- low cost
- power losses
- integrated circuit
- chip design
- ultra low power
- leakage current
- multi layer
- focal plane
- power quality
- equivalent circuit
- charge coupled device
- reactive power
- electrical power
- digital signal processing
- data center
- power system