Nanometer MOSFET Effects on the Minimum-Energy Point of Sub-45nm Subthreshold Logic - Mitigation at Technology and Circuit Levels.
David BolDenis FlandreJean-Didier LegatPublished in: ACM Trans. Design Autom. Electr. Syst. (2010)
Keyphrases
- minimum energy
- cmos technology
- low energy
- field effect transistors
- silicon on insulator
- low voltage
- electron microscopy
- logic synthesis
- low power
- metal oxide semiconductor
- delay insensitive
- logic circuits
- nm technology
- digital circuits
- high speed
- power consumption
- chip design
- electron beam lithography
- cost effective
- random access memory
- steady state
- data processing