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Deriving FSM-based tests using $a, b-\text{faults}$ for Logic Circuits.
Andrey Laputenko
Nina Yevtushenko
Valentina Andreeva
Anzhela Yu. Matrosova
Published in:
ISVLSI (2022)
Keyphrases
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logic circuits
low power
test cases
text mining
finite state machines
functional decomposition
high speed
fault detection
information retrieval
keywords
hidden markov models
query language
fault diagnosis
logic synthesis