A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications.
Aibin YanYuting HeXiaoxiao NiuJie CuiTianming NiZhengfeng HuangPatrick GirardXiaoqing WenPublished in: IEEE Des. Test (2023)
Keyphrases
- low power
- highly robust
- power dissipation
- power consumption
- high speed
- low cost
- cmos technology
- flip flops
- single chip
- power reduction
- vlsi circuits
- low power consumption
- digital signal processing
- mixed signal
- image sensor
- real time
- ultra low power
- logic circuits
- partial occlusion
- high resolution
- viewpoint
- feature space
- gate array
- image sequences