The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices.
Abhitosh VaisKoen MartensJacopo FrancoDennis LinAliReza AlianPhilippe RousselS. SionckeNadine CollaertAaron TheanMarc M. HeynsGuido GroesenekenKristin De MeyerPublished in: IRPS (2015)